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january 2010 doc id 16855 rev 1 1/12 12 ESDA6V1-5T6 transil? arrays for esd protection features 5 uni-directional transil diodes breakdown voltage v br = 6.1 v min. low leakage current < 200 na very small pcb area: 1.0 mm2 350 m pitch micro-package lead-free and rohs package high esd protection level high integration suitable for high density boards complies with the following standards iec 61000-4-2 level 4: ? 15 kv (air discharge) ? 8 kv (contact discharge) mil std 883g- method 3015-7: class 3b ? hbm (human body model) applications where transient overvoltage protection in esd sensitive equipment is required, such as: cellular phone handsets and accessories computers printers communication systems video equipment set top boxes description the ESDA6V1-5T6 is monolithic arrays designed to protect up to 5 lines against esd transients. the device is ideal for applications where both reduced print circuit board space and high esd protection level are required. figure 1. functional diagram tm : transil is a trademark of stmicroelectronics micro dfn package 1.0 x 1.0-6l i/o1 6 4 i/o5 i/o3 5 gnd 3 2 1 i/o2 i/o4 www.st.com
characteristics ESDA6V1-5T6 2/12 doc id 16855 rev 1 1 characteristics figure 2. electrical characteristics (definitions) table 2. electrical characteristics (values, t amb = 25 c) table 1. absolute maximum ratings (t amb = 25 c) symbol parameter value unit v pp esd iec 61000-4-2, air discharge esd iec 61000-4-2, contact discharge 15 8 kv p pp peak pulse power dissipation (8/20 s) (1) 1. for a surge greater than the maximum val ues, the diode will fail in short-circuit. t j initial = t amb 35 w i pp repetitive peak pulse current typical value (8/20 s) 3 a t j junction temperature 125 c t stg storage temperature range -55 + 150 c t l maximum lead temperature for soldering during 10 s 260 c symbol test conditions min. typ. max. unit v br i r = 1 ma 6.1 7.2 v i rm v rm = 3 v 200 na cv r = 3 v dc, f osc = 1 mhz, v osc = 30 mv rms 34 70 pf symbol parameter v = breakdown voltage i = leakage current @ v v = stand-off voltage br rm rm rm v i v cl v br v rm i f v f i rm i pp slope: 1/r d
ESDA6V1-5T6 characteristics doc id 16855 rev 1 3/12 figure 3. relative variation of peak pulse power versus initial junction temperature figure 4. peak pulse power versus exponential pulse duration 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 0 25 50 75 100 125 150 t (c) j p (w) pp 1 10 100 1000 1 10 100 1000 p (w) pp t (s) p figure 5. clamping voltage versus peak pulse current (typical values, exponential waveform) figure 6. forward voltage drop versus peak forward current (typical values) 0.1 1.0 10.0 56789 10 11 12 13 14 15 16 wave 8/20 s - t= 25 c v (v) cl i (a) pp 0.00 0.01 0.10 1.00 10.00 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 i (a) fm v (v) fm figure 7. junction capacitance versus reverse voltage applied (typical values) figure 8. relative variation of leakage current versus junction temperature (typical values) 0 10 20 30 40 012345 voltage(v) c(pf) c i/o - gnd c i/o - i/o 1 10 100 25 50 75 100 125 i [t ] / i [t = 25 c] rj rj t (c) j
characteristics ESDA6V1-5T6 4/12 doc id 16855 rev 1 figure 9. s21 attenuation measurement results of each channel figure 10. analog crosstalk measurements between channels 100.0k 1.0m 10.0m 100.0m 1.0g -30.00 -25.00 -20.00 -15.00 -10.00 -5.00 0.00 s21 (db) f(hz) 100.0k 1.0m 10.0m 100.0m 1.0g -140.00 -120.00 -100.00 -80.00 -60.00 -40.00 -20.00 0.00 crosstalk (db) f(hz) figure 11. esd response to iec 61000-4-2 (+15 kv air discharge) on each channel figure 12. esd response to iec 61000-4-2 (-15 kv air discharge) on each channel 10 v/div 100 ns/div c2 5 v/div 100 ns/div c 2 c2
ESDA6V1-5T6 ordering information scheme doc id 16855 rev 1 5/12 2 ordering information scheme figure 13. ordering information scheme esda 6v1 5t6 esd array package 6v1 = 6.1 volts min breakdown voltage 5 = 5 lines t = micro dfn, pitch 0.35 mm 6 = 6 pads
package information ESDA6V1-5T6 6/12 doc id 16855 rev 1 3 package information figure 14. footprint dimensions (in millimeters ) table 3. micro qfn 1.0 x 1.0-6l dimensions ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.31 - 0.40 0.012 - 0.016 a1 0.00 0.02 0.05 0.00 0.0008 0.002 b 0.10 0.15 0.20 0.004 0.006 0.008 d 0.95 1.00 1.05 0.037 0.039 0.041 e 0.95 1.00 1.05 0.037 0.039 0.041 l1 0.22 0.32 0.42 0.009 0.012 0.016 e - 0.35 - - 0.014 - d e b index area pin#1 id seating top view bottom view e 0.06 0.56 (d/2xe/2) side view a1 plane l=0.36 0.10 index area (d/2xe/2) l1 a 1.280 0.520 0.560 0.175 0.900 0.240 0.520 0.375 0.200 0.150 0.175
ESDA6V1-5T6 package information doc id 16855 rev 1 7/12 figure 15. tape and reel specifications user direction of unreeling all dimensions in mm 4.0 0.1 2.0 0.05 2.0 0.05 1.75 0.1 3.5 0.05 ? 1.50 + 0.10 / -0.00 0.53 0.05 0.23 0.02 1.13 0.05 8.0 0.3 1.13 0.05 jj j
recommendation on pcb assembly ESDA6V1-5T6 8/12 doc id 16855 rev 1 4 recommendation on pcb assembly 4.1 stencil opening design 1. general recommendation on stencil opening design a) stencil opening dimensions: l (length), w (width), t (thickness). figure 16. stencil opening dimensions b) general design rule stencil thickness (t) = 75 ~ 125 m 2. reference design a) stencil opening thickness: 100 m b) stencil opening for central exposed pad: opening to footprint ratio is 50%. c) stencil opening for leads: opening to footprint ratio is 90%. figure 17. recommended stencil window position l t w aspect ratio w t ----- 1.5 = aspect area lw 2t l w + () --------------------------- - 0.66 = 1.280 0.520 0.560 0.175 0.900 0.240 0.520 0.375 0.200 0.150 0.175 150 m m 520 footprint stencil window footprint t=100 m and opening ratio is 100% 175 m 175 m m 550 m 520
ESDA6V1-5T6 recommendation on pcb assembly doc id 16855 rev 1 9/12 4.2 solder paste 1. halide-free flux qualification rol0 according to ansi/j-std-004. 2. ?no clean? solder paste is recommended. 3. offers a high tack force to resist component movement during high speed. 4. solder paste with fine particles: powder particle size is 20-45 m. 4.3 placement 1. manual positioning is not recommended. 2. it is recommended to use the lead recognition capabilities of the placemen t system, not the outline centering. 3. standard tolerance of 0.05 mm is recommended. 4. 3.5 n placement force is recommended. too much placement force can lead to squeezed out solder paste and cause solder joints to short. too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. to improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. for assembly, a perfect supporting of the pcb (all the more on flexible pcb) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. 4.4 pcb design preference 1. to control the solder paste amount, the closed via is recommended instead of open vias. 2. the position of tracks and open vias in the solder area should be well balanced. the symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away.
recommendation on pcb assembly ESDA6V1-5T6 10/12 doc id 16855 rev 1 4.5 reflow profile figure 18. st ecopack ? recommended soldering reflow profile for pcb mounting note: minimize air convection currents in the reflow oven to avoid component movement. 0 01234567 time (min) temperature (c) 2c/s recommended 6c/s max 220c 125 c 260c max 255c 180c 90 sec max 10-30 sec 90 to 150 sec 3c/s max 0 01234567 time (min) temperature (c) 2c/s recommended 6c/s max 220c 125 c 260c max 255c 180c 90 sec max 10-30 sec 90 to 150 sec 3c/s max
ESDA6V1-5T6 ordering information doc id 16855 rev 1 11/12 5 ordering information 6 revision history table 4. ordering information order code marking package weight base qty delivery mode ESDA6V1-5T6 j dfn1.0x1.0-6l 1.78 mg 3000 tape and reel table 5. document revision history date revision changes 21-jan-2010 1 initial release.
ESDA6V1-5T6 12/12 doc id 16855 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2010 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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